1. Field of Endeavor
Example embodiments include methods for forming electrodes for organic electronic devices, organic thin film transistors comprising electrodes formed by such methods, and display devices comprising such organic thin film transistors. More specifically, example embodiments include methods for forming electrodes for organic electronic devices in which the source/drain electrodes and data lines can be formed using different conductive materials, organic thin film transistors comprising such electrodes, and display devices comprising such organic thin film transistors.
2. Description of the Related Art
Efforts to increase levels of integration in electronic devices including, for example, integrated circuits and liquid crystal displays, and reduce the overall size of the electronic devices have resulted in design rules reflecting gradually decreasing critical dimensions including, for example, the conductor width and spacing of electrode patterns formed during fabrication of such devices.
Shadow mask, photolithography and ink-jet printing processes are currently used for forming micropatterns of electrodes on substrates. As illustrated in FIG. 1, the formation of electrodes using a conventional ink-jet printing process typically includes forming a gate electrode on a substrate. A gate insulator pattern is then formed on the gate electrode and source/drain electrodes (for example, Au electrodes) are formed on the gate insulator pattern. Active region banks are then formed on the source/drain electrodes and the gate insulator pattern, and finally, an active region pattern is then formed on the gate insulator pattern in the region defined by the active region banks.
Problems associated with the conventional shadow-mask processes include, for example, a limited selection of electrode materials including, for example, such as gold (Au) and indium tin oxide (ITO), and limited patterning of electrodes. Further, the use of photographic processes causes the problem that materials for source/drain electrodes, i.e., materials for data lines, are generally limited to gold (Au) and indium tin oxide (ITO). Further, ink-jet printing processes may have difficulty forming electrode patterns consistently exhibiting the desired sizing and registration for fabricating devices governed by design rules that, for example, limit electrode width to not more than 40 μm, intended to provide an increased degree of integration.
As illustrated in FIGS. 1A-1E, conventional fabrication of transistor may include the formation of the gate electrode on a suitable substrate 100 after the substrate has been prepared and/or cleaned to prepare the surface and remove impurities using one or more conventional processes. As will be appreciated by those in the art, a wide range of substrate materials may be used successfully including organic and inorganic insulating materials. A conductive layer may then formed on the cleaned substrate and patterned to obtain a gate electrode pattern 102. Conventional metals, metal alloys, metal nitrides, metal oxides, silicides and/or one or more conductive polymers can be used in forming the conductive layers from which the gate electrode pattern is formed.
A gate insulator pattern 104 may then be formed on the gate electrode pattern 102 using a conventional process. As will be appreciated by those skilled in the art, there are a number of conventional materials that may be suitable for forming the gate insulator pattern including, for example, organic materials and/or inorganic materials.
Source/drain electrodes 106 may then be formed on the gate insulator pattern 104. Active region banks 108 may then be formed to define an active region between the source/drain electrodes 106 and above a region of the gate insulator pattern 104 and the gate electrode pattern 102. A semiconductor material 110 is then deposited between the active region banks to form an active region that is controlled by the gate electrode 102 to provide for current flow between the corresponding source/drain electrodes 106. The fabrication of the semiconductor device may then be completed using a range of conventional processes that will be well known to one of ordinary skill in the art.